Man page - ibv_bind_mw(3)
Packages contas this manual
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- mlx5dv_devx_qp_query(3)
- ibv_req_notify_cq(3)
- ibv_destroy_flow_action(3)
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- mlx5dv_flow_action_esp(3)
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- mlx5dv_devx_get_async_cmd_comp(3)
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- ibv_wr_set_xrc_srqn(3)
- ibv_create_srq_ex(3)
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- mlx5dv_dr_action_create_default_miss(3)
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- ibv_dealloc_pd(3)
- ibv_destroy_ah(3)
- mlx5dv_devx_obj_destroy(3)
- ibv_query_qp(3)
- ibv_rate_to_mbps(3)
- mlx5dv_mkey_check(3)
- mlx5dv_crypto_login(3)
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- mlx5dv_dr_table_destroy(3)
- mlx5dv_sched_leaf_modify(3)
- ibv_import_mr(3)
- mbps_to_ibv_rate(3)
- mlx5dv_wr_set_dc_addr(3)
- mlx5dv_devx_umem_reg(3)
- mlx5dv_free_var(3)
- ibv_modify_wq(3)
- mlx5dv_crypto_logout(3)
- mlx5dv_devx_obj_modify(3)
- ibv_destroy_rwq_ind_table(3)
- mlx5dv_devx_free_msi_vector(3)
- mlx5dv_dr_action_create_push_vlan(3)
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- mlx5dv_modify_qp_sched_elem(3)
- ibv_create_cq(3)
- mlx5dv_dr_aso_other_domain_link(3)
- ibv_open_device(3)
- mlx5dv_devx_cq_query(3)
- mlx5dv_wr_set_mkey_layout_interleaved(3)
- mlx5dv_open_device(3)
- mlx5dv_devx_create_eq(3)
- ibv_query_pkey(3)
- mlx5dv_pp_alloc(3)
- hnsdv(7)
- ibv_alloc_mw(3)
- mlx5dv_dump(3)
- hnsdv_is_supported(3)
- mlx5dv_crypto_login_query(3)
- mlx5dv_dr_action_create_dest_root_table(3)
- mlx5dv_devx_srq_modify(3)
- ibv_ack_async_event(3)
- ibv_node_type_str(3)
- ibv_wr_rdma_read(3)
- ibv_wr_send_imm(3)
- ibv_query_gid_ex(3)
- ibv_wr_set_sge(3)
- ibv_close_xrcd(3)
- efadv_query_device(3)
- mlx5dv_dr_action_create_dest_devx_tir(3)
- mlx5dv_query_qp_lag_port(3)
- ibv_get_srq_num(3)
- mlx5dv_devx_alloc_uar(3)
- mlx5dv_devx_destroy_cmd_comp(3)
- ibv_wr_atomic_cmp_swp(3)
- mlx5dv_create_flow_action_packet_reformat(3)
- ibv_init_ah_from_wc(3)
- ibv_query_qp_data_in_order(3)
- mlx4dv(7)
- ibv_post_send(3)
- ibv_fork_init(3)
- ibv_create_ah(3)
- mlx5dv_devx_umem_reg_ex(3)
- mlx5dv_devx_free_uar(3)
- mlx5dv_reg_dmabuf_mr(3)
- ibv_open_qp(3)
- ibv_destroy_comp_channel(3)
- mlx5dv_get_vfio_device_list(3)
- mlx5dv_devx_obj_query(3)
- mlx5dv_devx_get_event(3)
- ibv_dealloc_td(3)
- ibv_create_comp_channel(3)
- ibv_create_srq(3)
- efadv_create_driver_qp(3)
- ibv_create_rwq_ind_table(3)
- mlx5dv_dr_action_destroy(3)
- mlx5dv_crypto_login_query_state(3)
- ibv_wr_flush(3)
- ibv_wr_set_inline_data_list(3)
- ibv_dealloc_mw(3)
- ibv_query_port(3)
- mlx5dv_sched_leaf_create(3)
- ibv_attach_mcast(3)
- efadv_create_qp_ex(3)
- efadv(7)
- ibv_inc_rkey(3)
- mlx5dv_devx_srq_query(3)
- mlx5dv_dr_domain_sync(3)
- mlx5dv_dump_dr_rule(3)
- ibv_create_qp(3)
- ibv_alloc_td(3)
- mlx5dv_dr_action_modify_flow_meter(3)
- ibv_wr_rdma_write_imm(3)
- mlx5dv_create_flow(3)
- ibv_wr_local_inv(3)
- ibv_read_counters(3)
- ibv_ack_cq_events(3)
- ibv_destroy_counters(3)
- ibv_free_device_list(3)
- mlx5dv_dr_action_create_modify_header(3)
- mlx5dv_modify_qp_lag_port(3)
- mlx5dv_qp_cancel_posted_send_wrs(3)
- ibv_poll_cq(3)
- mlx5dv_dr_action_create_dest_array(3)
- mlx5dv_devx_subscribe_devx_event(3)
- mlx5dv_dr_flow(3)
- ibv_memcpy_from_dm(3)
- mlx5dv_wr_mkey_configure(3)
- mlx5dv_create_mkey(3)
- ibv_attach_counters_point_flow(3)
- mlx5dv_devx_create_cmd_comp(3)
- mlx5dv_wr_post(3)
- mlx5dv_devx_wq_query(3)
- ibv_set_ece(3)
- mlx5dv_wr_set_mkey_sig_block(3)
- mlx5dv_dr_table_create(3)
- mlx5dv_dr_aso_other_domain_unlink(3)
- mlx5dv_create_flow_action_modify_header(3)
- mlx5dv_dump_dr_domain(3)
- mlx5dv_devx_destroy_event_channel(3)
- mlx5dv_devx_wq_modify(3)
- ibv_wr_set_sge_list(3)
- mlx5dv_sched_node_modify(3)
- ibv_get_pkey_index(3)
- ibv_post_srq_recv(3)
- ibv_reg_mr(3)
- ibv_wr_bind_mw(3)
- ibv_create_flow(3)
- ibv_get_device_name(3)
- mlx5dv_wr_mr_interleaved(3)
- mlx5dv_wr_set_mkey_access_flags(3)
- ibv_get_device_index(3)
- ibv_wr_complete(3)
- mlx5dv_dr_action_create_dest_table(3)
- mlx5dv_get_clock_info(3)
- ibv_wr_set_inline_data(3)
- ibv_destroy_qp(3)
- mlx5dv_sched_node_destroy(3)
- mlx5dv_wr_mr_list(3)
- mlx5dv_wr_raw_wqe(3)
- mlx5dv_dr_action_create_packet_reformat(3)
- mlx5dv_dek_create(3)
- mlx4dv_query_device(3)
- ibv_detach_mcast(3)
- manadv_init_obj(3)
- ibv_modify_qp(3)
- mlx5dv_get_data_direct_sysfs_path(3)
- mlx5dv_dr_action_modify_aso(3)
- ibv_destroy_cq(3)
- mlx5dv_devx_create_event_channel(3)
- ibv_wr_set_ud_addr(3)
- mlx5dv_sched_leaf_destroy(3)
- mlx5dv_devx_subscribe_devx_event_fd(3)
- mlx5dv_qp_ex_from_ibv_qp_ex(3)
- ibv_create_flow_action(3)
- mlx5dv_devx_general_cmd(3)
- efadv_query_ah(3)
- mlx4dv_init_obj(3)
- mlx5dv_dump_dr_matcher(3)
- mlx5dv_wr_set_mkey_crypto(3)
- mlx5dv_alloc_var(3)
- ibv_close_device(3)
- mlx5dv_dr_action_create_flow_counter(3)
- mlx5dv_dr_rule_create(3)
- ibv_get_device_list(3)
- ibv_create_counters(3)
- mlx5dv_reserved_qpn_dealloc(3)
- mlx5dv_destroy_steering_anchor(3)
- mlx5dv_dr_action_create_flow_sampler(3)
- ibv_query_srq(3)
- mlx5dv_vfio_process_events(3)
- ibv_memcpy_to_dm(3)
- ibv_free_dm(3)
- mlx5dv_sched_node_create(3)
- manadv(7)
- mlx5dv_dr_action_create_dest_ibv_qp(3)
- mlx5dv_devx_obj_query_async(3)
- ibv_alloc_parent_domain(3)
- ibv_unimport_pd(3)
- ibv_wr_send(3)
- mlx5dv_create_qp(3)
- ibv_port_state_str(3)
- mlx5dv_wr_set_dc_addr_stream(3)
- mlx5dv_dr_domain_allow_duplicate_rules(3)
- ibv_query_gid_table(3)
- mlx5dv_devx_ind_tbl_modify(3)
- mlx5dv_dr_matcher_create(3)
- efadv_query_mr(3)
- ibv_is_fork_initialized(3)
- mlx5dv_wr_set_mkey_layout_list(3)
- ibv_query_rt_values_ex(3)
- mlx5dv_reserved_qpn_alloc(3)
- ibv_wr_post(3)
- manadv_set_context_attr(3)
- ibv_resize_cq(3)
- ibv_wr_atomic_fetch_add(3)
- mlx5dv_create_cq(3)
- mult_to_ibv_rate(3)
- ibv_query_ece(3)
- mlx5dv_query_port(3)
- mlx5dv_is_supported(3)
- ibv_destroy_srq(3)
- mlx5dv_dek_destroy(3)
- mlx5dv_crypto_login_create(3)
- ibv_post_srq_ops(3)
- ibv_get_cq_event(3)
- mlx5dv_devx_ind_tbl_query(3)
- ibv_modify_qp_rate_limit(3)
- mlx5dv_create_steering_anchor(3)
- ibv_modify_cq(3)
- mlx5dv_ts_to_ns(3)
- mlx5dv_init_obj(3)
- ibv_import_pd(3)
- mlx5dv(7)
- mlx5dv_modify_qp_udp_sport(3)
- mlx5dv_dr_action_create_pop_vlan(3)
- mlx5dv_create_flow_matcher(3)
- ibv_import_device(3)
- ibv_query_device(3)
- mlx5dv_dm_map_op_addr(3)
- ibv_create_qp_ex(3)
- mlx5dv_crypto_login_destroy(3)
- mlx5dv_dump_dr_table(3)
- mlx5dv_devx_query_eqn(3)
- ibv_create_cq_ex(3)
- ibv_bind_mw(3)
- mlx5dv_devx_qp_modify(3)
- ibv_reg_dm_mr(3)
- ibv_advise_mr(3)
- ibv_wr_start(3)
- mlx5dv_devx_cq_modify(3)
- mlx5dv_dr_action_create_aso(3)
- ibv_wr_abort(3)
- hnsdv_query_device(3)
- mlx5dv_dr_domain_set_reclaim_device_memory(3)
- ibv_post_recv(3)
- ibv_wr_rdma_write(3)
- ibv_open_xrcd(3)
- ibv_rate_to_mult(3)
- mlx5dv_dr_domain_destroy(3)
- ibv_import_dm(3)
- mlx5dv_devx_alloc_msi_vector(3)
- ibv_wr_send_tso(3)
- mlx5dv_dr_matcher_set_layout(3)
- mlx5dv_dr_domain_create(3)
- ibv_get_device_guid(3)
- mlx5dv_destroy_mkey(3)
- ibv_modify_flow_action(3)
- hnsdv_create_qp(3)
- mlx5dv_dek_query(3)
- mlx5dv_pp_free(3)
- ibv_alloc_null_mr(3)
apt-get install libibverbs-dev
Manual
| IBV_BIND_MW(3) | Libibverbs Programmer's Manual | IBV_BIND_MW(3) |
NAME
ibv_bind_mw - post a request to bind a type 1 memory window to a memory region
SYNOPSIS
#include <infiniband/verbs.h>
int ibv_bind_mw(struct ibv_qp *qp, struct ibv_mw *mw,
struct ibv_mw_bind *mw_bind);
DESCRIPTION
ibv_bind_mw() posts to the queue pair qp a request to bind the memory window mw according to the details in mw_bind.
The argument mw_bind is an ibv_mw_bind struct, as defined in <infiniband/verbs.h>.
struct ibv_mw_bind {
uint64_t wr_id; /* User defined WR ID */
unsigned int send_flags; /* Use ibv_send_flags */
struct ibv_mw_bind_info bind_info; /* MW bind information */
}
struct ibv_mw_bind_info {
struct ibv_mr *mr; /* The MR to bind the MW to */
uint64_t addr; /* The address the MW should start at */
uint64_t length; /* The length (in bytes) the MW should span */
unsigned int mw_access_flags; /* Access flags to the MW. Use ibv_access_flags */
};
The QP Transport Service Type must be either UC, RC or XRC_SEND for bind operations.
The attribute send_flags describes the properties of the WR. It is either 0 or the bitwise OR of one or more of the following flags:
- IBV_SEND_FENCE Set the fence indicator.
- IBV_SEND_SIGNALED Set the completion notification indicator. Relevant only if QP was created with sq_sig_all=0
The mw_access_flags define the allowed access to the MW after the bind completes successfully. It is either 0 or the bitwise OR of one or more of the following flags:
- IBV_ACCESS_REMOTE_WRITE Enable Remote Write Access. Requires local write access to the MR.
- IBV_ACCESS_REMOTE_READ Enable Remote Read Access
- IBV_ACCESS_REMOTE_ATOMIC Enable Remote Atomic Operation Access (if supported). Requires local write access to the MR.
- IBV_ACCESS_ZERO_BASED If set, the address set on the 'remote_addr' field on the WR will be an offset from the MW's start address.
RETURN VALUE
ibv_bind_mw() returns 0 on success, or the value of errno on failure (which indicates the failure reason). In case of a success, the R_key of the memory window after the bind is returned in the mw_bind->mw->rkey field.
NOTES
The bind does not complete when the function return - it is merely posted to the QP. The user should keep a copy of the old R_key, and fix the mw structure if the subsequent CQE for the bind operation indicates a failure. The user may safely send the R_key using a send request on the same QP, (based on QP ordering rules: a send after a bind request on the same QP are always ordered), but must not transfer it to the remote in any other manner before reading a successful CQE.
Note that for type 2 MW, one should directly post bind WR to the QP, using ibv_post_send.
SEE ALSO
ibv_alloc_mw(3), ibv_post_send(3), ibv_poll_cq(3) ibv_reg_mr(3),
AUTHORS
| 2016-02-02 | libibverbs |